1. Project background
The theory of the LED light and the schematic diagram of the teaching board have been described in detail in the case 1 flashing light, so I will not describe it here. Interested readers can return to read.
2. Design goals
This project uses 4 LED lights---LED1~LED4 to realize the function of a breathing light. The specific changes of these 4 lights are:
After an interval of 1 second, the first light will be on for 1 second; then the second light will be on for 2 seconds after an interval of 1 second; then the third light will be on for 3 seconds after an interval of 1 second, and the fourth light will be on for 1 second. On for 4 seconds. So it goes back and forth.
The following is the waveform diagram:
The effect diagram of the upper board is shown in the figure below.
Three, module design
Let's first analyze the LED lights on the board. Each LED light has a signal to control, if the signal is 0, the light is on, if the signal is 1, the light is on. Now we want to control 4 LED lights to turn on and off, then we need 4 signals, assuming they are led0, led1, led2 and led3. These 4 signals are respectively connected to 4 led lights. If you want to make LED0 light 0 bright and LED1~3 lights come, then FPGA will let the led0 signal be 0, and the led1~3 signals are all 1.
In summary, our project needs 6 signals: clock clk, reset rst_n, led0, led1, led2 and led3.
Let's analyze the functional requirements again. The first light will be on for 1 second after an interval of 1 second; then the second light will be on for 2 seconds after an interval of 1 second; and then the third light will be on for 3 seconds after an interval of 1 second. The 4 lights are on for 4 seconds every 1 second. So it goes back and forth.
The above functional requirements can also be translated as: for LED0, after resetting, first off for 1 second, on for 1 second, then off for 12 seconds, cyclically; for LED1, after resetting, first off for 3 seconds, on for 2 seconds, then Turn off for another 9 seconds, cyclically; for LED2, after resetting, turn off for 6 seconds, turn on for 3 seconds, and then turn off for 5 seconds, cyclically; for LED3, turn off for 10 seconds and on for 4 seconds, cyclically.
Then translate it into a signal to understand:
After reset, let the signal led0=1 for 1 second, then let led0=0 for 1 second, and then let led0=1 for 12 seconds. Back and forth.
After reset, let the signal led1=1 for 3 seconds, then let led1=0 for 2 seconds, and then let led1=1 for 9 seconds. Back and forth.
After reset, let the signal led2=1 for 6 seconds, then let led2=0 for 3 seconds, and then let led2=1 for 5 seconds. Back and forth.
After resetting, let the signal led3=1 for 10 seconds, and then let led3=0 for 4 seconds. Back and forth.
Then translate it into a waveform as shown in the figure below.
It can be seen from the figure that the minimum unit of change of the signals led0~led3 is 1 second, and all 4 signals will cycle once after 14 seconds. From the idea of ​​simple design method, it is easy to conclude that we need 2 counters, one counter is used to calculate the time of 1 second, and the other counter is used to calculate the time of 14 seconds. With these two counters, there is a standard for the change time of led0~led3.
We use a counter to calculate the time of 1 second, the name of the counter is cnt0. The working clock of this project is 50MHz, that is, the period is 20ns, and the counter counts to 1_000_000_000/20=50_000_000, we can know that 1 second is up. The counter counts continuously and never stops. It can be considered that the plus 1 condition is always valid, which can be written as: assign add_cnt==1. In summary, the code of the counter is as follows.
We use another counter to represent 14 seconds, named cnt1. The counter indicates the number of times. Naturally, it adds 1 every 1 second, which is end_cnt0. The counter counts 14 times in total. So the code is:
With two counters, let's think about the change of the output signal led0. To sum up, led0 has two changes: change 0 and change 1. The reason for changing to 0 is to count to 1 second, that is, when add_cnt1 && cnt1==1-1, led0 changes to 0. The reason for the change is that when it counts to 2 seconds, that is, when add_cnt1 && cnt1==2-1, led0 changes to 1. So the code of led0 signal is as follows:
Next we consider the change of the output signal led1. In summary, led1 has two kinds of change points: change 0 and change 1. The reason for changing to 0 is to count to 3 seconds, that is, when add_cnt1 && cnt1==3-1, led1 changes to 0. The reason for the change is that when the count reaches 5 seconds, that is, when add_cnt1 && cnt1==5-1, led1 changes to 1. So the code of led1 signal is as follows:
Next we consider the change of the output signal led2. In summary, led2 has two kinds of change points: change 0 and change 1. The reason for changing to 0 is to count to 6 seconds, that is, when add_cnt1 && cnt1==6-1, led2 changes to 0. The reason for the change is that when the count reaches 9 seconds, that is, when add_cnt1 && cnt1==9-1, led2 changes to 1. So the code of led2 signal is as follows:
Next we think about the change of the output signal led3. To sum up, led3 has two changes: change 0 and change 1. The reason for changing to 0 is to count to 10 seconds, that is, when add_cnt1 && cnt1==10-1, led3 changes to 0. The reason for the change is that when it counts to 14 seconds, that is, add_cnt1 && cnt1==14-1, that is, when end_cnt1, led3 changes to 1. So the code of led3 signal is as follows:
This time, the main procedure has been completed. The next step is to complete the module.
Define the name of the module as huxiled. And we already know that the module has six signals: clk, rst_n, led0, led1, led2, led3. For this, the code is as follows:
Among them, clk and rst_n are input signals, led0, led1, led2, and led3 are output signals, and the six signals are all 1-bit. Based on this information, we supplement the definition of input and output ports. code show as below:
Next, define the signal type.
cnt0 is a signal generated by always, so the type is reg. The maximum value of cnt0 count is 500_000_000, which needs to be represented by 29 lines, that is, the bit width is 29 bits. So the code is as follows:
Both add_cnt0 and end_cnt0 are designed with assign, so the type is wire. And its value is 0 or 1, only 1 line is required. So the code is as follows:
cnt1 is a signal generated by always, so the type is reg. The maximum value of cnt1 count is 8, which needs to be represented by 4 lines, that is, the bit width is 4 bits. So the code is as follows:
Both add_cnt1 and end_cnt1 are designed with assign, so the type is wire. And its value is 0 or 1, just 1 line indicates it. So the code is as follows:
led0, led1, led2, and led3 are designed in an always way, so the type is reg. And its value is 0 or 1, just 1 line indicates it. So the code is as follows:
At this point, the design of the entire code has been completed. The next step is to create a new project and view the phenomenon on the board.
Four, comprehensive engineering and boarding
New Construction
First, create a project folder named "huxiled" in Disk D, name the code written "huxiled.v", and name the top-level module "huxiled".
Then open Quartus II and click New Project Wzard. in the File drop-down list. . New project option.
3. In the interface that appears, click Next directly.
4. After that, the interface for setting project folder, project name, and top-level module name appears. Fill in according to the previous naming, and then click Next.
5. After that is the file adding interface. Click on the red arrow to add the previously written "huxiled.v" file, click on the "Add" button on the right, and then the file will appear at the black arrow, click, and then click on "Next".
Device model selection interface. Select Cyclone â…£E at the upper red arrow, select EP4CE6F17C8 at the middle red arrow, and then click "Next".
EDA tool interface. Click "Next" directly.
8. After the interface appears, click "Finish".
Comprehensive
1. After the new project steps are completed, the following interface will appear. Select the file you want to compile and click the compile button.
2. After the compilation is successful, the following interface will appear, click "OK".
Configuration pin
1. Click the pin configuration button pointed by the arrow.
2. The figure below is the schematic diagram we want to use, where the arrow points to the six pins we want to configure, which are clk, rst, led0, led1, led2, and led3.
3. Double-click on the arrow in the figure below to fill in the corresponding pin number and press Enter.
Place and route
After the pin configuration is completed, a compilation is performed.
Connect the development board
In the picture, the downloader is connected to the USB port of the computer, the power supply is connected to the power supply, and then press the blue switch below.
On board
1. Double-click the position pointed by the arrow.
2. The following interface will appear, click "Start", and the progress will be displayed in "Progress".
3. After the success is indicated in the progress bar, the corresponding phenomenon can be observed on the development board.
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