Traditional converters use analog hardware to implement closed-loop feedback control and obtain stable voltage and current output. The analog control reacts to the system status in real time, and the response speed is relatively fast. However, in the field of testing technology and instrument products, the stability of the analog system cannot meet actual needs. In order to obtain high stability performance, a large number of components need to be added for loop compensation. Moreover, factors such as load, environmental changes, and parasitic parameters, drift, aging, and inconsistency of components in the feedback loop affect the stability of the system to a certain extent [1, 2]. Therefore, in a high-performance converter system that requires a faster real-time response speed, analog control is difficult to achieve good transient response to the complex changes of input voltage and load, and stable control under multiple states cannot be obtained.
With the rapid development of integrated circuit manufacturing technology, a large number of programmable digital chips and microprocessors have been continuously introduced, and digital control converters have begun to attract people's attention. The DC converter has entered the era of digital converters from the era of analog converters [3, 4]. The core of digital control technology is that the digital closed-loop control algorithm is completed through software configuration, which greatly reduces the use of analog devices, reduces the complexity of the hardware system, realizes precise nonlinear control, and avoids system instability due to device parameter changes and failures. degree. At the same time, digital filters are used in the system to realize the zero-pole automatic compensation function of the control loop, which greatly improves the loop control performance. The more mature control chips in the field of digital-to-DC converters are mainly MCUs or DSPs, but due to speed limitations [5, 6], scholars have begun to focus on FPGAs, such as literature [7-9]. However, the core of the literature [7-9] lies in pulse width modulation technology. This paper proposes a new design scheme to study a programmable DC converter that uses FPGA to realize digital control technology, and achieves high and stable voltage and current output.
1 Scheme design1.1 System design
Compared with the traditional analog cycle control DC converter, the digital control DC converter has higher stability, reliability and flexibility, and can adapt to more complex dynamic loads. The block diagram of the digital programmable DC converter circuit is shown in Figure 1. It is mainly composed of 5 basic circuit modules, which are FPGA circuit, digital-to-analog conversion DAC circuit, power conversion circuit, detection circuit and analog-to-digital conversion ADC circuit. FPGA circuit, as the core device of digital DC converter control, realizes voltage closed-loop control and current closed-loop control. The detection circuit collects the output voltage and current signals of the converter, converts them into digital feedback signals through the ADC circuit, and sends them to the FPGA for digital signal processing, and compares them with the digital set values ​​of voltage and current. After FPGA digital processing, the output voltage and current digital mixed error are converted into analog error by a DAC circuit, and then enter the power conversion circuit to complete the nonlinear and accurate output of voltage and current signals.
1.2 FPGA design
FPGA chooses XILINX company XC3S2000-5FGG456C chip, this device not only has abundant clock resources and I/O resources, but also has good repeatable erasing performance, simple debugging and convenient programming, which can well meet the design needs of this article.
The FPGA control principle is shown in Figure 2, including three parts: digital filtering, digital comparison and digital integration. Among them, the digital filter and integrator are configured by users according to different loads. Adjust the DC accuracy and output response by changing the integral time constant. The digital filter is also a zero-pole filter with self-definition compensation, which is used to change the phase of the system to avoid overvoltage shock and oscillation due to the fast response of the system. Digital filtering and digital integration constitute the overall response of the system. The digital filters and integrators can be customized for different load characteristics to obtain ideal DC output.
2 Main hardware circuit design2.1 Power conversion circuit design
The power conversion circuit is the focus of the hardware circuit design of this article. It is mainly to complete energy conversion for power output or power absorption, but it also affects the output ripple, noise, conversion efficiency and stability of the converter. The circuit diagram is shown in the figure. 3 shown. V12, R79, R80, C143, C145 form an active filter with voltage stabilization function. Utilizing the current amplification effect of V12 to amplify the base ripple suppression capability, greatly reducing the capacity of the filter capacitor, and significantly improving the filter effect of the circuit. V13 and V14 are differential pairs of tubes, which form a single-input single-output differential amplifier circuit with R81, R82, R83, R85, and R86, which convert the V13 base signal into a V14 collector signal for output and send it to the V16 base. V15, V18, V23, R84, R88, R89, R91, C146 form a constant current source circuit, which increases the input impedance of the amplifier circuit, while suppressing common mode signals and providing current; V23 is a double diode, which provides for V15 and V18 Bias voltage, and set constant current value through R84 and R91. V16 and R86 form a common emitter amplifier circuit, which maps V13 base signal changes. V17, R90, R409 and R410 compose the VBE expansion circuit, its function is to provide proper DC bias for V19 and V22 to eliminate the crossover distortion of V19 and V22. The double diode V38 provides an appropriate bias voltage to V39 and V40 to ensure that V39 and V40 are in a micro-conduction state to prevent crossover distortion of V39 and V40. V20, V21, R78, R95, R96 and R179 form a bidirectional current protection circuit. R78 is a current monitoring resistor, which controls the on and off of V20 and V21 by feeding back the voltage difference between its two ends. Once the forward output is overcurrent, the voltage across R78 is greater than the BE junction voltage of V20, V20 is turned on, V19 and V40 are turned off, and the output is restricted; on the contrary, the reverse output is overcurrent, and the voltage across R78 is greater than the V21 BE junction voltage, V21 Turn on, V22 and V39 turn off, and the output is restricted. R404, R405, R406, R407, C324, C325 lead the output signal back to the input, provide negative feedback for the power conversion circuit, ensure the stability of the control loop, and effectively suppress the output noise.
2.2 DAC circuit design
The DAC circuit shown in Figure 4 converts the digital error signal output by the FPGA into an analog error signal to complete the control of the power conversion circuit. Among them, the DA converter uses the 14-bit high-speed low-power device AD9744 with an operating frequency of 78 MHz, which fully meets the system's requirements for accuracy and bandwidth. Operational amplifiers N86 and N87 choose high-speed and low-noise AD8021ARM, which are characterized by low input offset voltage and fast conversion rate. The configuration of AD9744 and AD8021ARM provides high-speed and high-precision driving guarantee for the power conversion circuit.
2.3 ADC circuit design
The ADC circuit converts the analog feedback signal into a digital signal and provides it to the FPGA for processing. It is divided into voltage ADC and current ADC, but the circuit principle is the same. The circuit is shown in Figure 5. The number of bits of the AD converter directly determines the system resolution and accuracy. For this reason, the 24-bit high-performance device AD7760 is selected with an input frequency of 39 MHz.
3 software designIn the digital DC converter, the hardware circuit is the basis of the software configuration, and the software configuration is the soul of the hardware circuit, responsible for the operation and management of the system. Figure 6 shows the specific workflow of the digital DC converter system.
After starting up, FPGA first downloads the configuration program, the system writes the voltage ADC and current ADC registers, and initializes the voltage gear control relay, current gear control relay, and output relay. Then, the system enters the self-check and calibration mode. If the system self-check and calibration pass, go to the next step, otherwise the software turns off the output relay. After the self-check and calibration are completed, input the system voltage and current settings, and set the corresponding working mode. After the voltage and current feedback loop gears are set, start the master ADC and the slave ADC. At this time, the voltage and current are closed-loop controlled. Established and the system started to work. If there is no over-voltage or over-current protection, the system outputs signals to the outside, otherwise the system stops. When the system is working, the software monitors the output of the compliant ADC at the same time. If the output of the compliant ADC is greater than the set value, the system automatically switches the working mode. Among them, the master ADC and slave ADC are determined according to the converter working mode. In voltage source mode, the master ADC and slave ADC are voltage ADC and current ADC respectively; in current source mode, the master ADC and slave ADC are current ADC and voltage ADC respectively.
4 Experimental resultsFigure 7 (a) ~ (i) are the actual ripple waveforms at different output voltage levels under no-load, resistive load and capacitive load conditions measured by an oscilloscope. Table 1 shows the corresponding voltage output values. It can be seen from Table 1 that no matter what the load condition, the output of the digital programmable DC converter changes in a relatively small range, the output is very stable and the accuracy is high, up to 6/10,000. At the same time, comparing the ripple waveform chart in Fig. 7, it is found that the output ripple of the digitally controlled DC converter is only 40 mV, which is even less than 10 mV under capacitive load conditions, and under the same load characteristics, the output ripple is almost not affected by the output voltage. influences.
5 ConclusionThis paper describes the design scheme, hardware circuit and software design of the digital programmable DC converter, and gives the actual results of the converter. The actual measurement shows that the digital voltage/current closed-loop control technology using FPGA as the core can be realized, and the converter has obtained a stable and high-precision output, and its output ripple is also very small, with a minimum of 10 mV. In addition, the converter reduces the use of analog devices, reduces the complexity of the hardware system, can achieve precise nonlinear control, avoids system instability due to device parameter changes, failures, etc., and has strong dynamic load adaptability. Therefore, it has very good application value in the field of precision instruments and testing.
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