LTC2655 pin function diagram and application

The following is the circuit diagram of [LTC2655 pin function diagram and application]

Features Integrated 10ppm/oC Maximum Reference Maximum INL Error: ±4LSB (at 16 bits)
Monotonically selectable internal or external reference over temperature
2.7V to 5.5V power supply range (LTC2655-L)
Integrated reference buffer
Ultra-low crosstalk between DACs (<1nV•s)
Power-On Reset to Zero-Scale/Intermediate-Scale Asynchronous DAC Update Pins in a Tiny 20-Pin 4mm x 4mm QFN Package and a 16-Pin Narrow SSOP Package

Internal structure map:

The LTC2655 is a 4-channel, I2C, 16-bit/12-bit, rail-to-rail DAC family with an integrated 10ppm/oC maximum reference. These DACs feature built-in high performance, rail-to-rail output buffers and are guaranteed to be monotonic. The LTC2655-L features a 2.5V full-scale output and integrated reference with a single operating supply from 2.7V to 5.5V. The LTC2655-H features a 4.096V full-scale output and integrated reference with a single operating supply from 4.5V to 5.5V. Each DAC can also operate with an external reference that sets the DAC full-scale output to twice the external reference. These devices feature a 2-wire I2C-compatible serial interface. The LTC2655 operates in standard mode (maximum clock frequency is 100kHz) and fast mode (maximum clock frequency is 400kHz). The LTC2655 includes a power-on reset circuit that is controlled by the PORSEL pin. If the PORSEL pin is tied to GND, the DAC is reset to zero scale on power-up. If the PORSEL pin is tied to VCC, the DAC will be reset to the midscale on power-up.

(Editor: Circuit Diagram)