1 Introduction
FPGA (Field Programmable Gate Array) field programmable gate array is further developed on the basis of PAL, GAL, PLD. As a semi-custom circuit in the field of application specific integrated circuit (ASIC), FPGA not only solves the custom circuit. Insufficient, and overcome the shortcomings of the limited number of original programmable device gates. Using FPGAs to develop digital circuits can dramatically reduce design time. From simple NAND gates to high-performance CPUs, FPGAs can do all digital devices.
2 software platform builder
When designing an FPGA embedded system, it is often necessary to access peripheral devices such as LEDs and audio interfaces through software programming. Touch screen, etc. However, you need to be familiar with the working conditions of the relevant peripherals when programming, including the device registers required for the device to work. Device specific commands. The communication protocol used and the interrupts that need to be processed. The software platform builder (SPB) of the AD software provides the underlying modules (software IP modules) associated with configuration data and drivers for these specific peripherals, providing an application programming interface (API) for accessing peripheral devices.
When designing an embedded system under AD software, the use of SPB is implemented through a software platform file (SwPlatform). SPB is a graphical user interface that can read the FPGA design by itself, import the appropriate low-level modules for the peripheral devices in the design, and add more high-level IP modules to the software platform files based on this. Which IP module is specifically added depends on which peripheral devices need to be accessed in the FPGA embedded design. When accessing peripheral devices, you can use multiple IP modules provided by SPB. The lower-level IP module can access a specific storage device, such as a hard disk. SD card. RAM drives, higher-level IP blocks are more abstract and more hardware-independent.
The software platform file (SwPlatform) is a software layer selected from a series of provided components in the SPB. Software platform files enable applications to leverage hardware, such as storage services and network services, through a standardized set of services. The purpose of the software platform file is to enable the hardware device to provide an application programming interface (API) for the peripheral device through an abstract and common software interface. The Device Stacks in the software platform consists of three types of modules, each of which is a hardware wrapper. Driver and Con-text. The device stack is typically built from the bottom up, starting with the lowest-level modules associated with a particular hardware device on the schematic design. On top of this, higher-level modules can be stacked, providing a more general function of accessing peripherals. At the bottom of the device stack is the hardware wrapper, then the driver, and finally the Context. The higher the level of abstraction of the module to the hardware, the higher the stack. The function description of the device stack layer is shown in Table 1.
The Software Service in SPB is a type of application that can be used by an application. definition. Structure and function functions. The software service is included to access the SD card. IDE storage device. Storage services for files on CF cards and flash memory; network services for providing Ethernet access; core services that provide POSIX-compliant multi-threading capabilities; GUI services that allow rapid construction of modern graphical interfaces; for audio and video functions Multimedia service. System services for interrupt management and software timing management are always present in the software platform and are independent of specific devices. Each different software module contains complete API reference information. API reference information can be accessed through the API Reference, and each layer in the stack has a detailed description of the functions available on that layer. View Header 2 embedded audio processing system design for any driver or service program with Header Files
2.1 OpenBus system design
In the embedded design, when dealing with the connection relationship between the peripheral device and the processor, the open bus (OpenBus system) in the AD software can be used, so that the connection process will be greatly simplified. The "OpenBus System" is a term describing a "module" connection that uses a common bus to implement logical functionalities throughout the system [3]. In the OpenBus system documentation, open the OpenBus Palette panel and select and place the components needed to make up the system. Devices used in FPGA design in the OpenBus Palette panel are classified as Connectors by function. Processors. Memories. Peripherals (peripherals), etc. Each OpenBus device must be properly configured before it can be used. This Open-Bus system is designed differently than traditionally placing the processor and peripheral circuitry as components on the board. It removes all low-level traces and interconnect details and allows the system to be built quickly.
In the embedded audio processing system of this paper, the audio stream signal is obtained by accessing the high-fidelity audio interface on the NB3000 development board. In the design of the OpenBus main processor system, select and place the microprocessor (32-bit RISC Processor TSK3000A). Connector (Interconnect). I2S Audio Streaming Controller (Audio Streaming Control-ler). OpenBus devices such as SPI controller (SPI Controller) and SRAM controller (SRAMController) are connected as shown in Figure 1. At the same time, parameters are configured for the OpenBus device. Configure the data transfer size parameter of the SPI controller to 32. Configure the I2S Hardware Buffer parameter of the I2S audio stream controller as 4k samples and I2S to the interrupt number INT_I1.
Figure 1 OpenBus system design
In general, any FPGA design that uses the OpenBus system must design a top-level schematic that places the interface circuitry. The Open-Bus system file in Figure 1 acquires audio stream data for the 32-bit processor TSK3000A and I/O interface logic, including the host processor system in the FPGA design. The constraint file connects the port at the top of the schematic to the actual physical pin of the target FPGA device. The constraint file contains not only port-to-pin mapping, but also clock distribution. Other relevant design specifications such as target devices.
The top-level schematic connects the embedded system design downloaded to the FPGA to the physical pins of the FPGA device through a constraint file. In the top schematic design, the audio stream controller I2S is connected to the audio codec (AUDIO_CODEC), and the SPI controller is connected to the audio codec controller CS4270 (AUDIO_CODEC_CTRL), as shown in Figure 2.
Figure 2 Top-level schematic design
2.2 software platform file design
On the basis of SPB, build a software platform file (SwPlat-form) that accesses the audio interface of the NB 3000 development board and processes the audio stream data, as shown in Figure 3.
Figure 3 Software block diagram of the software platform builder
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